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Browsing by Subject "Adaptive biasing"

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    A 30-mA Compensation-Free Output-Capacitorless Analog LDO With Hybrid Adaptive Biasing
    (Institute of Electrical and Electronics Engineers (IEEE), 2025-08)
    Yee Chyan Tan
    ;
    Harikrishnan Ramiah
    ;
    Sharifah Fatmadiana Wan Muhamad Hatta
    ;
    Nai Shyan Lai
    ;
    Chee-Cheow Lim
    ;
    Rui P. Martins
    ;
    Pui-In Mak
    ;
    Yong Chen
    This article presents an output-capacitorless low-dropout regulator (OCL-LDO), merging with a hybrid push-pull buffer. The hybrid push-pull buffer implements a dynamic and adaptive biasing push-pull gate driving circuit, achieving stability without needing a complex compensation circuit and external load capacitor. Our devised OCL-LDO can operate with a load current range of 0-30 mA, with a quiescent current of 7 mu A at zero load current. The proposed OCL-LDO is fabricated in a 0.18-mu m CMOS process with an active area of 0.03 mm(2). Measurement results show that with a load current stepping from 0-30 mA and an edge time of 100 ns, the output voltage undershoot is 0.14 V, with a corresponding recovery time of 150 ns. The measured load regulation is 0.207 mV/mA at a supply voltage of 1.15 V and a dropout voltage of 0.15 V.
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